ESD protection is essential to control the Electro-Static Discharge event from damaging sensitive circuitry within a product. But its location within the system needs to be considered carefully and is sometimes not obvious at the schematic level.
I’d like to share with you a great example of this that I found whilst working on a customer’s system. I probably wouldn’t have spotted this without testing but I will certainly have it in mind for future design reviews.
In this instance, the Equipment Under Test is formed from a 2 part metal chassis consisting a large base and a hinged lid. On the lid there is a membrane keypad that interfaces via a Flat Flexible Cable (FFC) to the front panel PCB. There is a second ribbon cable from front panel PCB to CPU board carrying the button presses to the processor.
The ESD protection is on the front panel cable, next to the point where the unit is likely to be touched – the keys. So far, so good.
The base and lid are connected elsewhere via the typical long piece of green and yellow wire for electrical safety purposes. The inductance of this connection (long wire, single point) means that it has minimal effect at the high frequencies present in an ESD waveform. Also, the case halves are separated by a rubber environmental seal meaning there is no contact around the edge of the case.
EUT + ESD = ???
So what happens when the EUT is subject to an ESD event? There is no discharge to the plastic membrane keypad on the top and discharges to the Vertical Coupling Plane don’t have any effect. However, when a discharge is made to the seam between the lid and base, something interesting happens.
Because of the conditions mentioned earlier (large seam with a significant, remote impedance connecting the lid to the base) the pulse is free to couple to the internal cable assembly as shown below.
Because the ESD protection is on the front panel display board it is unable to prevent the flow of high frequency current down the cable and into the CPU.
The effect of the discharge is to cause the entire system to reset and eventually the GPIO lines responsible for monitoring the front panel keys were damaged to the point of non functionality.
On the face of it, the designers had acted sensibly; the ESD protection was right next to the interface that was likely to be touched by the user. However, the design of the case and the routing of the cable proved to be a problem – something that was not anticipated.
With the addition of some simple capacitive filtering or ESD protection at the point at which the cable enters the CPU board this problem was overcome.
There are lessons for us all here that I would summarise as:
- Consider every cable as a risk, even internal ones
- Watch out for cables crossing enclosure seams or apertures where coupling is a risk. Not a dissimilar situation to a PCB trace crossing a split in a ground plane – and we all know how bad those can be, right?
- Consider how the PCBs and cables will be integrated within the system through a mechanical design review (with your EMC hat on)
- It doesn’t matter how well designed you think your system is, testing is necessary to find these problems